Computer Organization


Q141.

How many 32K x 1 RAM chips are needed to provide a memory capacity of 256K-bytes?
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Q142.

Suppose you want to build a memory with 4 byte words and a capacity of 2^{21} bits. What is type of decoder required if the memory is built using 2K \times 8 RAM chips?
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Q143.

If each address space represents one byte of storage space, how many address lines are needed to access RAM chips arranged in a 4 \times 6 array, where each chip is 8K \times 4 bits ?
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Q144.

The refreshing rate of dynamic RAMs is in the range of
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Q145.

How many 32K x 1 RAM chips are needed to provide a memory capacity of 256Kbytes?
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Q146.

A RAM chip has a capacity of 1024 words of 8 bits each (1K x 8). The number of 2 x 4 decoders with enable line needed to construct a 16K x 16 RAM from 1K x 8 RAM is
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Q147.

The amount of ROM needed to implement a 4 bit multiplier is
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Q148.

A dynamic RAM has a memory cycle time of 64 nsec. It has to be refreshed 100 times per msec and each refresh takes 100 nsec. What percentage of the memory cycle time is used for refreshing?
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Q149.

What is the minimum size of ROM required to store the complete truth table of an 8-bit \times 8-bit multiplier?
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Q150.

Number of chips (128 \times 8 RAM) needed to provide a memory capacity of 2048 bytes
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