ISRO CSE 2009
Q31.
The use of multiple register windows with overlap causes a reduction in the number of memory accesses for: I. Function locals and parameters II. Register saves and restores III. Instruction fetchesQ32.
A CPU has 24-bit instructions. A program starts at address 300 (in decimal). Which one of the following is a legal program counter (all values in decimal)?Q33.
Consider a pipelined processor with the following four stages: IF: Instruction Fetch ID: Instruction Decode and Operand Fetch EX: Execute WB: Write Back The IF, ID and WB stages take one clock cycle each to complete the operation. The number of clock cycles for the EX stage depends on the instruction. The ADD and SUB instructions need 1 clock cycle and the MUL instruction needs 3 clock cycles in the EX stage. Operand forwarding is used in the pipelined processor. What is the number of clock cycles taken to complete the following sequence of instructions? \begin{array}{lllll} \textbf{ADD} & \text{R2, R1, R0} &&& \text{R2 $\leftarrow$ R1+R0} \\ \textbf{MUL} & \text{R4, R3, R2} &&& \text{R4 $\leftarrow$ R3*R2} \\ \textbf{SUB} & \text{R6, R5, R4} &&& \text{R6 $\leftarrow$ R5-R4} \\ \end{array}Q34.
Consider the polynomial p(x) = a_0 + a_1x + a_2x^2 + a_3x^3 , where a_i \neq 0, \forall i. The minimum number of multiplications needed to evaluate p on an input x is:Q35.
A root \alpha of equation f(x)=0 can be computed to any degree of accuracy if a 'good' initial approximation x_0 is chosen for whichQ36.
The formula P_k = y_0 + k \triangledown y_0+ \frac{k(k+1)}{2} \triangledown ^2 y_0 + \dots + \frac{k \dots (k+n-1)}{n!} \triangledown ^n y_0 isQ37.
Let f(x) be the continuous probability density function of a random variable x, the probability that a \lt x \leq b, is :Q38.
If the pdf of a Poisson distribution is given by f(x) = \frac{e^{-2} 2^x}{x!}then its mean isQ39.
Which is the correct definition of a valid process transition in an operating system?