Machine Instruction
Q31.
A CPU has 24-bit instructions. A program starts at address 300 (in decimal). Which one of the following is a legal program counter (all values in decimal)?Q32.
Consider the following program segment. Here R1, R2 and R3 are the general purpose registers. Assume that the content of memory location 3000 is 10 and the content of the register R3 is 2000. The content of each of the memory locations from 2000 to 2010 is 100. The program is loaded from the memory location 1000. All the numbers are in decimal. Assume that the memory is word addressable. After the execution of this program, the content of memory location 2010 is:Q33.
Consider these two functions and two statements S1 and S2 about them. S1 : The transformation from work 1 to work 2 is valid, i.e., for any program state and input arguments, work 2 will compute the same output and have the same effect on program state as work 1 S2 : All the transformations applied to work 1 to get work 2 will always improve the performance (i.e. reduce CPU time) of work 2 compared to work 1Q34.
The use of multiple register windows with overlap causes a reduction in the number of memory accesses for I. Function locals and parameters II. Register saves and restores III. Instruction fetchesQ35.
If we use internal data forwarding to speed up the performance of a CPU (R1, R2 and R3 are registers and M[100] is a memory reference), then the sequence of operations R1 \rightarrow M[100] M[100] \rightarrow R2 M[100] \rightarrow R3 can be replaced byQ36.
Consider the following program segment. Here R1, R2 and R3 are the general purpose registers. Assume that the content of memory location 3000 is 10 and the content of the register R3 is 2000. The content of each of the memory locations from 2000 to 2010 is 100. The program is loaded from the memory location 1000. All the numbers are in decimal. Assume that the memory is byte addressable and the word size is 32 bits. If an interrupt occurs during the execution of the instruction "INC R3", what return address will be pushed on to the stack?Q37.
Consider a new instruction named branch-on-bit-set (mnemonic bbs). The instruction "bbs reg, pos, labbel" jumps to label if bit in position pos of register operand reg is one. a register is 32 bits wide and the bits are numbered 0 to 31, bit in position 0 being the least significant. Consider the following emulation of this instruction on a processor that does not have bbs implemented. temp\rightarrowreg & mask Branch to label if temp is non-zero The variable temp is a temporary register. For correct emulation the variable mask must be generated byQ38.
Following table indicates the latencies of operations between the instruction producing the result and instruction using the result. \begin{array}{|l|l|c|} \hline \textbf {Instruction producing the result} & \textbf{Instruction using the result }& \textbf{Latency} \\\hline \text{ALU Operation} & \text{ALU Operation} & 2 \\\hline \text{ALU Operation} & \text{Store} & \text{2}\\\hline \text{Load} & \text{ALU Operation} & \text{1}\\\hline \text{Load} & \text{Store} & \text{0} \\\hline \end{array} Consider the following code segment: Load R1, Loc 1; Load R1 from memory location Loc1 Load R2, Loc 2; Load R2 from memory location Loc 2 Add R1, R2, R1; Add R1 and R2 and save result in R1 Dec R2; Decrement R2 Dec R1; Decrement R1 Mpy R1, R2, R3; Multiply R1 and R2 and save result in R3 Store R3, Loc 3; Store R3 in memory location Loc 3 What is the number of cycles needed to execute the above code segment assuming each instruction takes one cycle to execute?Q39.
In an instruction execution pipeline, the earliest that the data TLB (Translation Lookaside Buffer) can be accessed isQ40.
The memory locations 1000,1001 and 1020 have data values 18,1 and 16 respectively before the following program is executed. \begin{array}{llll} \text{MOVI} & \text{$R_s, 1$} && \text{; Move immediate} \\ \text{LOAD} & \text{$R_d, 1000(R_s)$} && \text{; Load from memory}\\ \text{ADDI} & \text{$ R_d, 1000$} && \text{; Add immediate}\\ \text{STOREI} & \text{$0(R_d), 20$} && \text{; Store immediate} \end{array} Which of the statements below is TRUE after the program is executed ?