Memory Chip Design
Q11.
A RAM chip has a capacity of 1024 words of 8 bits each (1K x 8). The number of 2 x 4 decoders with enable line needed to construct a 16K x 16 RAM from 1K x 8 RAM isQ14.
What is the minimum size of ROM required to store the complete truth table of an 8-bit \times 8-bit multiplier?Q15.
Choose the correct alternatives (more than one may be correct) and write the corresponding letters only: The advantages of CMOS technology over a MOS is:Q16.
The capacity of a memory unit is defined by the number of words multiplied by the number of bits/word. How many separate address and data lines are needed for a memory of 4K \times 16?Q17.
Number of chips (128 \times 8 RAM) needed to provide a memory capacity of 2048 bytesQ18.
A main memory unit with a capacity of 4 megabytes is built using 1Mx1-bit DRAM chips. Each DRAM chip has 1K rows of cells with 1K cells in each row. The time taken for a single refresh operation is 100 nanoseconds. The time required to perform one refresh operation on all the cells in the memory unit isQ20.
A ROM is used to store the table for multiplication of two 8-bit unsigned integers. The size of ROM required is