GATE PYQ

Interrupt

Q21.
A CPU has two modes-privileged and non-privileged. In order to change the mode from privileged to non-privileged

Q22.
A device employing INTR line for device interrupt puts the CALL instruction on the data bus while

Q23.
An interrupt in which the external device supplies its address as well as the interrupt requests is known as

Q24.
Identify the logic function performed by the circuit shown in figure.

Q25.
Which of the following devices should get higher priority in assigning interrupts?

Q26.
The TRAP is one of the interrupts available in INTEL 8085. Which one of the following statements is true of TRAP ?

Q27.
Which of the following statements about synchronous and asynchronous I/O is NOT true?

Q28.
RST 7.5 interrupt in 8085 microprocessor executes the interrupt service routing from interrupt vector location

Q29.
On receiving an interrupt from an I/O device,the CPU

Q30.
Consider the following statements. I. Daisy chaining is used to assign priorities in attending interrupts. II. When a device raises a vectored interrupt, the CPU does polling to identify the source of interrupt. III. In polling,the CPU periodically checks the status bits to know if any device needs its attention. IV. During DMA, both the CPU and DMA controller can be bus masters at the same time. Which of the above statements is/are TRUE?